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| MC74HC365A Hex 3-State Noninverting Buffer with Common Enables High-Performance Silicon-Gate CMOS The MC74HC365A is identical in pinout to the LS365. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device is a high-speed hex buffer with 3-state outputs and two common active-low Output Enables. When either of the enables is high, the buffer outputs are placed into high-impedance states. The HC365A has noninverting outputs. Features http://onsemi.com MARKING DIAGRAMS 16 16 1 PDIP-16 N SUFFIX CASE 648 1 16 16 1 SOIC-16 D SUFFIX CASE 751B 1 16 16 1 TSSOP-16 DT SUFFIX CASE 948F 1 A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G or G = Pb-Free Package (Note: Microdot may be in either location) HC 365A ALYWG G HC365AG AWLYWW MC74HC365AN AWLYYWWG * * * * * * * * Output Drive Capability: 15 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 mA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity: 90 FETs or 22.5 Equivalent Gates These are Pb-Free Devices* ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. (c) Semiconductor Components Industries, LLC, 2009 December, 2009 - Rev. 2 1 Publication Order Number: MC74HC365A/D MC74HC365A OUTPUT ENABLE 1 A0 Y0 A1 Y1 A2 Y2 GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC OUTPUT ENABLE 2 A5 Y5 A4 Y4 A3 Y3 A3 A4 A5 A2 6 10 12 14 7 9 11 13 Y2 Y3 Y4 Y5 A0 A1 2 4 3 5 Y0 Y1 Figure 1. Pin Assignment FUNCTION TABLE Inputs Enable 1 L L H X Enable 2 L L X H A L H X X Output Y L H Z Z 1 OUTPUT ENABLE 1 15 OUTPUT ENABLE 2 PIN 16 = VCC PIN 8 = GND Figure 2. Logic Diagram X = don't care Z = high impedance ORDERING INFORMATION Device MC74HC365ANG MC74HC365ADG MC74HC365ADR2G MC74HC365ADTR2G Package PDIP-16 (Pb-Free) SOIC-16 (Pb-Free) SOIC-16 (Pb-Free) TSSOP-16* Shipping 500 Units / Rail 48 Units / Rail 2500 Units / Reel 2500 Units / Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb-Free. http://onsemi.com 2 MC74HC365A MAXIMUM RATINGS* Symbol VCC Vin Vout Iin Iout ICC PD Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Current, per Pin DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Plastic DIP SOIC Package TSSOP Package Value - 0.5 to + 7.0 - 0.5 to VCC + 0.5 - 0.5 to VCC + 0.5 20 25 50 750 500 450 - 65 to + 150 260 Unit V V V mA mA mA mW This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, Vin and Vout should be constrained to the range GND v (Vin or Vout) v VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. Tstg TL Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds Plastic DIP, SOIC or TSSOP Package _C _C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Derating -- Plastic DIP: - 10 mW/_C from 65_ to 125_C SOIC Package: - 7 mW/_C from 65_ to 125_C TSSOP Package: - 6.1 mW/_C from 65_ to 125_C RECOMMENDED OPERATING CONDITIONS Symbol VCC Vin, Vout TA tr, tf Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) Operating Temperature, All Package Types Input Rise and Fall Time (Figure 1) VCC = 2.0 V VCC = 3.0 V VCC = 4.5 V VCC = 6.0 V Min 2.0 0 - 55 0 0 0 0 Max 6.0 VCC + 125 1000 600 500 400 Unit V V _C ns DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) Guaranteed Limit Symbol VIH Parameter Minimum High-Level Input Voltage Test Conditions Vout = VCC - 0.1 V |Iout| v 20 A VCC V 2.0 3.0 4.5 6.0 2.0 3.0 4.5 6.0 2.0 4.5 6.0 |Iout| v 3.6 mA |Iout| v 6.0 mA |Iout| v 7.8 mA 3.0 4.5 6.0 - 55 to 25_C 1.5 2.1 3.15 4.2 0.50 0.90 1.35 1.80 1.9 4.4 5.9 2.48 3.98 5.48 v 85_C 1.5 2.1 3.15 4.2 0.50 0.90 1.35 1.80 1.9 4.4 5.9 2.34 3.84 5.34 v 125_C 1.5 2.1 3.15 4.2 0.50 0.90 1.35 1.80 1.9 4.4 5.9 2.20 3.70 5.20 Unit V VIL Maximum Low-Level Input Voltage Vout = 0.1 V |Iout| v 20 A V VOH Minimum High-Level Output Voltage Vin = VIH |Iout| v 20 A Vin = VIH V http://onsemi.com 3 MC74HC365A DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) Guaranteed Limit Symbol VOL Parameter Maximum Low-Level Output Voltage Test Conditions Vin = VIL |Iout| v 20 A Vin = VIL |Iout| v 3.6 mA |Iout| v 6.0 mA |Iout| v 7.8 mA VCC V 2.0 4.5 6.0 3.0 4.5 6.0 6.0 6.0 - 55 to 25_C 0.1 0.1 0.1 0.26 0.26 0.26 0.1 0.5 v 85_C 0.1 0.1 0.1 0.33 0.33 0.33 1.0 5.0 v 125_C 0.1 0.1 0.1 0.40 0.40 0.40 1.0 10 A A Unit V Iin IOZ Maximum Input Leakage Current Maximum Three-State Leakage Current Maximum Quiescent Supply Current (per Package) Vin = VCC or GND Output in High-Impedance State Vin = VIL or VIH Vout = VCC or GND Vin = VCC or GND Iout = 0 A ICC 6.0 4 40 160 A AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns) Guaranteed Limit Symbol tPLH, tPHL Parameter Maximum Propagation Delay, Input A to Output Y (Figures 1 and 3) VCC V 2.0 3.0 4.5 6.0 2.0 3.0 4.5 6.0 2.0 3.0 4.5 6.0 2.0 3.0 4.5 6.0 -- -- - 55 to 25_C 120 60 24 20 220 110 44 37 220 110 44 37 60 22 12 10 10 15 v 85_C 150 75 30 26 275 140 55 47 275 140 55 47 75 28 15 13 10 15 v 125_C 180 90 36 31 330 170 66 56 330 170 66 56 90 34 18 15 10 15 Unit ns tPLZ, tPHZ Maximum Propagation Delay, Output Enable to Output Y (Figures 2 and 4) ns tPZL, tPZH Maximum Propagation Delay, Output Enable to Output Y (Figures 2 and 4) ns tTLH, tTHL Maximum Output Transition Time, Any Output (Figures 1 and 3) ns Cin Cout Maximum Input Capacitance Maximum Three-State Output Capacitance (Output in High-Impedance State) pF pF Typical @ 25C, VCC = 5.0 V CPD Power Dissipation Capacitance (Per Buffer)* 2f 60 + ICC VCC . pF * Used to determine the no-load dynamic power consumption: P D = CPD VCC http://onsemi.com 4 MC74HC365A SWITCHING WAVEFORMS VCC tr INPUT A tPLH OUTPUT Y tTLH 90% 50% 10% tTHL 90% 50% 10% tPHL tf VCC GND OUTPUT Y OUTPUT ENABLE 50% GND tPZL 50% tPZH OUTPUT Y 50% tPHZ 10% 90% tPLZ HIGH IMPEDANCE VOL VOH HIGH IMPEDANCE Figure 1. Figure 2. TEST CIRCUITS TEST POINT OUTPUT DEVICE UNDER TEST DEVICE UNDER TEST TEST POINT OUTPUT 1 k CONNECT TO VCC WHEN TESTING tPLZ AND tPZL. CONNECT TO GND WHEN TESTING tPHZ AND tPZH. CL* CL* *Includes all probe and jig capacitance *Includes all probe and jig capacitance Figure 3. Figure 4. LOGIC DETAIL TO OTHER FIVE BUFFERS ONE OF 6 BUFFERS VCC Y INPUT A OUTPUT ENABLE 1 OUTPUT ENABLE 2 http://onsemi.com 5 MC74HC365A PACKAGE DIMENSIONS PDIP-16 N SUFFIX CASE 648-08 ISSUE T 9 -A- 16 B 1 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01 F S C L -T- H K G D 16 PL SEATING PLANE J TA M M 0.25 (0.010) M -A- SOIC-16 D SUFFIX CASE 751B-05 ISSUE K 9 16 -B- 1 8 P 8 PL 0.25 (0.010) M B S NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019 G F K C -T- SEATING PLANE R X 45 _ M D 16 PL M J DIM A B C D F G J K M P R 0.25 (0.010) TB S A S SOLDERING FOOTPRINT 6.40 16X 8X 1.12 16 1 16X 0.58 1.27 PITCH 8 9 DIMENSIONS: MILLIMETERS http://onsemi.com 6 MC74HC365A PACKAGE DIMENSIONS TSSOP-16 DT SUFFIX CASE 948F-01 ISSUE B 16X K REF 0.10 (0.004) 0.15 (0.006) T U S M TU S V S K 16 9 2X L/2 J1 B -U- L PIN 1 IDENT. 1 8 J N 0.15 (0.006) T U S 0.25 (0.010) M A -V- N F DETAIL E C 0.10 (0.004) -T- SEATING PLANE D G H DETAIL E SOLDERING FOOTPRINT 7.06 1 0.36 16X 16X 1.26 http://onsemi.com 7 EE CC EE C CCC CCC K1 SECTION N-N NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 --- 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.18 0.28 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.193 0.200 0.169 0.177 --- 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.007 0.011 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ -W- DIM A B C D F G H J J1 K K1 L M 0.65 PITCH DIMENSIONS: MILLIMETERS MC74HC365A ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 8 MC74HC365A/D |
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